international workshop on compact modeling will be held in Yokohama,
Japan, on January 24th, 2006. The workshop provides an
opportunity for the discussion and the presentation of advances in
modeling and simulation of integrated circuits.
Compact modeling for all kinds of devices
- Parameter extraction methodology and strategy
- Circuit simulation techniques
Authors should submit a camera-ready abstract with 2 to 10 pages
including figures for inclusion in the workshop proceedings. Paper
templates in TeX and Word formats are downloadable from the ASP-DAC 2006
site. Deadline for the submission is November 30th, 2005.
November 30, 2005
Deadline for abstract submission January 24, 2006
S. Kumashiro (STARC, Japan)
T. Ezaki (Hiroshima
Z. Yu (Tsinghua University, China)
M. Chan (Hong Kong University of Science & Technology, Hong Kong,
G. Yokomizo (Renesas Techology Corp., Japan)
T. Ohguro (Toshiba Corp., Japan)
T. Iizuka (NEC Electronics Corp., Japan)
M. Miura-Mattausch (Hiroshima University, Japan)
you have any question, please contact email@example.com.