Picture of Shuhei Amakawa  

Publications and presentations

Books

  1. 益 一哉,天川修平,『電子物性とデバイス』(付録,正誤表) (書評),電子情報通信レクチャーシリーズA-9,コロナ社,2020.
  2. M. Fujishima and S. Amakawa, Design of Terahertz CMOS Integrated Circuits for High-Speed Wireless Communication, IET, 2019.
  3. ナノテクノロジーの化学』, 第5版実験化学講座第28巻,日本化学会編,丸善,2005(分担執筆).
  4. FreeBSD徹底入門 改訂版』,翔泳社,2002(分担執筆).
  5. SNMPネットワーク管理ツール』,翔泳社,2001(監訳).
  6. FreeBSD徹底活用1:ネットワーク編』,翔泳社,1998(分担執筆).
  7. FreeBSD徹底活用』,翔泳社,1997(分担執筆).

Papers

Conferences, symposia, workshops, etc.

  • S. Amakawa, "Design of silicon CMOS ICs and modules for 6G: With headaches, possible cures, and open questions in measurements," 100th ARFTG Microwave Measurement Conference, Workshop on Emerging millimeter-wave & THz measurement for 6G communication, Las Vegas, Nevada, USA, January 25, 2023.
  • S. Amakawa, "Sub-THz CMOS transmission lines: Properties, characterization, and modeling," IEEE International Symposium on Radio-Frequency Integration Technology (RFIT), p. 64, September 2, 2020.
  • S. Amakawa and M. Fujishima, "300-GHz-band CMOS transmitter and receiver modules with WR-3.4 waveguide interface," IEEE MTT-S International Microwave Conference on Hardware and Systems for 5G and Beyond (IMC-5G), pp. 1–3, August 15, 2019.
  • S. Amakawa and M. Fujishima, "Wideband power-line decoupling technique for millimeter-wave CMOS integrated circuits," IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1–4, May 29, 2019.
  • S. Amakawa, "Characteristic impedance determination up to THz frequencies in light of causality," Global Symposium on Millimeter Waves (GSMM), pp. 35–37, May 23, 2019.
  • S. Amakawa, A. Takeshige, S. Hara, R. Dong, S. Lee, T. Yoshida, M. Fujishima, K. Masu, and H. Ito, "Causal characteristic impedance determination using calibration comparison and propagation constant," 92nd Automatic RF Techniques Group Microwave Measurement Conference (ARFTG), pp. 1–6, January 22, 2019.
  • S. Amakawa, "How does my microwave/EM simulator define complex-referenced S-parameters?," Vietnam-Japan Microwave (VJMW), pp. 112–115, June 14, 2017 (pdf).
  • S. Amakawa and Y. Ito, "Graphical approach to analysis and design of gain-boosted near-fmax feedback amplifiers," European Microwave Conference (EuMC), pp. 1039–1042, October 4, 2016.
  • S. Amakawa, K. Katayama, K. Takano, S. Hara, A. Kasamatsu, K. Mizuno, K. Takahashi, T. Yoshida, and M. Fujishima, "A QAM-capable 300-GHz CMOS transmitter," International Workshop on Smart Wireless Communications (SmartCom), pp. 39–46, May 17 2016.
  • S. Amakawa, "Concepts and methods in on-wafer RF and microwave measurements," International Conference on Microelectronic Test Structures (ICMTS), Tutorial, March 28 2016.
  • S. Amakawa, K. Katayama, K. Takano, M. Motoyoshi, T. Yoshida, and M. Fujishima, "Comparative analysis of on-chip transmission line de-embedding techniques," International Symposium on Radio-Frequency Integration Technology (RFIT), pp. 91–93, August 2015.
  • S. Amakawa, R. Goda, K. Katayama, K. Takano, T. Yoshida, and M. Fujishima, "Power line decoupling up to 325 GHz in CMOS," Vietnam-Japan Microwave (VJMW), pp. 1–2, August 2015.
  • S. Amakawa, R. Goda, K. Katayama, K. Takano, T. Yoshida, and M. Fujishima, "Power line decoupling up to 325 GHz in CMOS," Thailand-Japan Microwave (TJMW), pp. 1–2, August 2015.
  • S. Amakawa, R. Goda, K. Katayama, K. Takano, T. Yoshida, and M. Fujishima, "Wideband CMOS decoupling power line for millimeter-wave applications," IEEE MTT-S International Microwave Symposium (IMS), pp. 1–4, May 2015.
  • S. Amakawa, K. Katayama, K. Takano, T. Yoshida, and M. Fujishima, "On-wafer transmission line measurement above 100 GHz," Thailand-Japan Microwave (TJMW), pp. 1–2, November 2014.
  • S. Amakawa, "Theory of gain and stability of small-signal amplifiers with lossless reciprocal feedback," Asia-Pacific Microwave Conference (APMC), pp. 1184–1186, November 2014 [Correction].
  • S. Amakawa, A. Orii, K. Katayama, K. Takano, M. Motoyoshi, T. Yoshida, and M. Fujishima, "Design of well-behaved low-loss millimetre-wave CMOS transmission lines," 18th IEEE Workshop on Signal and Power Integrity (SPI), pp. 1–4, May 2014.
  • S. Amakawa, A. Orii, K. Katayama, K. Takano, M. Motoyoshi, T. Yoshida, and M. Fujishima, "Process parameter calibration for millimeter-wave CMOS back-end device design with electromagnetic field analysis," International Conference on Microelectronic Test Structures (ICMTS), pp. 182–187, March 2014.
  • 天川修平,折井瑛彦,丸岡元樹,片山光亮,高野恭弥,本良瑞樹,吉田毅,藤島実, 「オンチップ伝送線路評価のための試料設計」, 第33回シリコンアナログRF研究会,August 2013.
  • 天川修平,「半導体、電子デバイス、配線を回路理論の立場から学び直してみる」, 第60回応用物理学会春季学術講演会, チュートリアル(ショートコース),March 2013
  • 天川修平,藤島実,「多導体伝送線路系のためのS行列の定義の拡張」, 電子情報通信学会マイクロ波研究会,信学技報,vol. 112, no. 459, MW2012-165, pp. 37–38, March 2013.
  • 天川修平,「物理的意味のわかりやすいTRL導出方法」, 第31回シリコンアナログRF研究会,December 2012.
  • S. Amakawa, K. Takano, K. Katayama, M. Motoyoshi, T. Yoshida, and M. Fujishima, "On the choice of cascade de-embedding methods for on-wafer S-parameter measurement," International Symposium on Radio-Frequency Integration Technology (RFIT), pp. 137–139, November 2012.
  • 天川修平,「Cascade de-embedding再考」, 第30回シリコンアナログRF研究会,August 2012.
  • 天川修平, 「On-wafer測定に用いる散乱行列の基礎理論に関する一考察」, 第28回シリコンアナログRF研究会, March 2012.
  • 天川修平, 「 Sパラ再入門」(チュートリアル講演), 第27回シリコンアナログRF研究会,November 2011.
  • S. Amakawa, K. Yamanaga, H. Ito, T. Sato, N. Ishihara, and K. Masu, "S-parameter-based modal decomposition of multiconductor transmission lines and its application to de-embedding," International Conference on Microelectronic Test Structures (ICMTS), pp. 177–180, Oxnard/California, April 2009.
  • S. Amakawa, H. Ito, N. Ishihara, and K. Masu, "A simple de-embedding method for characterization of on-chip four-port networks," Advanced Metallization Conference (AMC), pp. 105–106, Del Mar/California, September 2008.
  • S. Amakawa, H. Ito, and K. Masu, "Signal transmission through interconnects with repetitive loads," Advanced Metallization Conference (AMC), pp. 173–174, Albany/New York, October 2007.
  • S. Amakawa, T. Uezono, T. Sato, K. Okada, and K. Masu, " Adaptable wire-length distribution with tunable occupation probability," International Workshop on System Level Interconnect Prediction (SLIP), pp. 1–8, Lakeway/Texas, March 2007 [Slides].
  • S. Amakawa, K. Nakazato, and H. Mizuta, "A surface-potential-based cylindrical surrounding-gate MOSFET model," International Conference on Solid State Devices and Materials (SSDM), pp. 638–639, Tokyo/Japan, September 2003.
  • S. Amakawa, K. Nakazato, and H. Mizuta, "A new approach to failure analysis and yield enhancement of very large-scale integrated systems," European Solid-State Device Research Conference (ESSDERC), pp. 147–150, September 2002.
  • S. Amakawa, H. Mizuta, and K. Nakazato, "Analysis of multi-phase clocked electron pump circuits," Silicon Nanoelectronics Workshop (SNW), pp. 30–31, Kyoto/Japan, June 2001.
  • S. Amakawa, H. Mizuta, and K. Nakazato, "Analysis of multi-clocked electron pump consisting of single-electron transistors," 4th International Workshop on Quantum Functional Devices, Kanazawa/Japan, 2000.
  • S. Amakawa, H. Mizuta, and K. Nakazato, "Performance optimisation of single-electron pump circuits," Sixth MEL-ARI/NID Workshop, Enschede/Netherlands, 2000.
  • S. Amakawa, M. Fujishima, and K. Hoh, "Single-electron tunneling through an asymmetric tunnel barrier," Sixth International Workshop on Computational Electronics (IWCE), pp. 137–140, Osaka/Japan, 1998.
  • S. Amakawa, K. Kanda, M. Fujishima, and K. Hoh, "Simulation of a single-electron flash memory," International Symposium on Formation, Physics and Device Application of Quantum Dot Structures, p. 80, Sapporo/Japan, 1998.
  • S. Amakawa, H. Majima, M. Fujishima, and K. Hoh, "High and low levels of simulation of single-electron circuits," International Semiconductor Device Research Symposium (ISDRS), pp. 349–352, Charlottesville/Virginia, 1997.
  • S. Amakawa, M. Fujishima, and K. Hoh, "Characterization of capacitively-coupled dual tunnel junction array," International Symposium on Formation, Physics and Device Application of Quantum Dot Structures, p. 154, Sapporo/Japan, 1996.
  • S. Amakawa, H. Fukui, M. Fujishima, and K. Hoh, "Cotunneling-tolerant single-electron logic," International Conference on Solid State Devices and Materials (SSDM), pp. 207–209, Osaka/Japan, 1995.

Others

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© 2012–2023 Shuhei AMAKAWA <amakawa@ hiroshima-u.ac.jp>. All rights reserved.